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How to identify chip packages/old
This page contains all computer chip or integrated circuit packages. A chip package is what surrounds the integrated circuit die and connects the die's pads to the packages external pins. =ALL packages = Howto identify integrated circuit(IC) chip packages/All images Through Hole Chip Other Surface Mount Leads Leadless Ball Grid Array(BGA) =List of IC package names= Through-hole DIL: Dual-Inline * DIP: Dual inline package 0.6" http://pdfserv.maxim-ic.com/package_dwgs/21-0046.PDF * Skinny DIP: Skinny Dual inline package 0.3" http://pdfserv.maxim-ic.com/package_dwgs/21-0045.PDF * CERDIP CDIP: Ceraminc Dual inline package http://pdfserv.maxim-ic.com/package_dwgs/21-0046.PDF * PDIP, PDIL: Plastic Dual In-Line package * SDIP, SHRDIL: Shrink Dual inline package * SPDIP: Shrink Plastic Dual In-line Package * Hybrid DIP: Hybrid Dual In-line Package * SBDIP: Side Brazed Dual In-line Package http://www.analog.com/UploadedFiles/Packages/51235406179213D_14.pdf * SBDIP-H: Side Brazed Dual In-line Package Hybrid http://www.analog.com/UploadedFiles/Packages/95955146DH_24A.pdf * BBDIP-H: Bottom Brazed Dual In-line Package Hybrid http://www.analog.com/UploadedFiles/Packages/249075335DH_14_1.pdf SIL: Single-Inline * SIP: Single in-line package PGA: Pin Grid Array * PGA: Pin grid array * PPGA: Plastic pin grid array * FCPGA: flip-chip pin grid array * CPGA: Ceramic pin grid array * OPGA: Organic pin grid array * FC-PGA: Flip Chip Pin Grid Array (Intel) * Micro-PGA: Micro Pin Grid Array Intel term ZIP * ZIP: zig-zag in-line package * PZIP: plastic zig-zag in-line package Surface Mount J-Lead DIL: Dual Inline SOIC: Small Outline Integrated Circuit *SOIC-N-EP: Small outline integrated circuit narrow body with exposed pads with heatsink http://www.analog.com/UploadedFiles/Packages/61978289575873RD_8_1.pdf *batwing SOIC, SOIC-BAT: Small outline integrated circuit thermally enhanced with fused leads (batwings) http://www.analog.com/UploadedFiles/Packages/479743993852630252966076RB_24.pdf *Mini-SOIC: Mini Small outline integrated circuit JEDEC: MO-187-AA http://www.national.com/packaging/folders/mua08a.html SO: Small Outline * SO-70 * SO-73 * SO-74A * SO-79 * SO-88, SC-70 6-lead http://pdfserv.maxim-ic.com/package_dwgs/21-0077.PDF * SSO: Single Small Outline package * VSO: Very Small Outline SOP: Small outline package * SOP, SO, SOIC: Small-Outline Package * PSOP: Plastic Small-Outline Package * PSOP-2: Plastic Small Outline package thermally enhanced with heatsink on top http://www.analog.com/UploadedFiles/Packages/740508026RP_20.pdf * PSOP-2: Plastic Small Outline package thermally enhanced with heatsink on bottom http://www.analog.com/UploadedFiles/Packages/306150045RP_28.pdf * PSSOP: Plastic Shrink Small-Outline Package * TSOP: Thin Small-Outline Package * TSOP I: Thin Small Outline Package type 1 * TSOP II: Thin Small Outline Package type II * TSSOP: Thin Shrink Small Outline Package http://www.analog.com/UploadedFiles/Packages/359224089841708504863856053953356548880RU08.pdf * TSSOP: Thin Shrink Small Outline Package with Exposed Pad (on bottom) http://www.analog.com/UploadedFiles/Packages/848536692RE_16_2.pdf * Wide-TSSOP: Wide Thin Shrink Small Outline Package http://www.analog.com/UploadedFiles/Packages/59272155RV_48.pdf * SSOP, Shrink SO: Shrink Small-Outline Package http://pdfserv.maxim-ic.com/package_dwgs/21-0056.PDF * QSOP: Shrink Small-Outline Package http://pdfserv.maxim-ic.com/package_dwgs/21-0055.PDF * QSOP-EP: Shrink Small-Outline Package http://www.analog.com/UploadedFiles/Packages/463694869638947604205402227482245767RC_16.pdf * HSOP: Heat sinked Small-Outline Package * HQSOP: Hermetic Quad Small-Outline Package * VSOP: Very Small Outline Package * uSOP, uMAX: micro Small Outline Package * MSOP, micro-SOIC: Mini Small Outline Package http://www.analog.com/UploadedFiles/Packages/51307149333291RM_8.pdf * MSOP-EP: Mini Small Outline Package Exposed pads http://www.analog.com/UploadedFiles/Packages/3789346RH_10_1.pdf SOT: Small outline transistor package Small Outline Transistor package * PSOT * SOT-23: Small Outline Transistor package (3,5,6, or 8 Leads) http://pdfserv.maxim-ic.com/package_dwgs/21-0057.PDF *SOT-66: Small Outline Package http://www.analog.com/UploadedFiles/Packages/31264640944370943880196908582RY_6_1.pdf *SOT-89: Small Outline Package * SOT-143: 4 Lead Small Outline Transistor Package http://pdfserv.maxim-ic.com/package_dwgs/21-0052.PDF * SOT-223: Small Outline Transistor Package (4 or 5 Leads) http://www.analog.com/UploadedFiles/Packages/3835053915420865981KC_3.pdf * TSOT-23: http://www.analog.com/UploadedFiles/Packages/36386423475738055171364995530241304137133UJ5.pdf SC * SC-101 * SC-70: Shrink Small outline transistor http://pdfserv.maxim-ic.com/package_dwgs/21-0075.PDF QIL: Quad Inline QFP: Quad Flat Package The quad flat package (QFP) is a thin flat square or rectangular package with J-Leads on all 4 sides. * QFP: Quad Flat Package * BQFP: Bumpered Quad Flat Package * BQFPH: Bumpered Quad Flat Package with Heat spreader * CQFP: Ceramic Quad Flat Package * FPQFP, FQFP: Fine Pitch Quad Flat Package * HQFP: Heat sinked Quad Flat Package * LQFP: Low Profile Quad Flat Package * MQFP, MQUAD: Metric Quad Flat Package http://pdfserv.maxim-ic.com/package_dwgs/21-0826.PDF * MQFP2: Metric Quad Flat Package with heat sink * MQFPH: Metric Quad Flat Package with Heat spreader * PQFP: Plastic Quad Flat Package * SQFP: Small Quad Flat Package * TQFP: Thin Quad Flat Package http://pdfserv.maxim-ic.com/package_dwgs/21-0110.PDF * TSQFP: Thin Shrink Quad Flat Pack * VQFP: Very small Quad Flat Package * VTQFP: Very Thin Quad Flat Package * SQFP2, SQFPN: Shrink Quad Flat Package with heat sink * TQFP2: Thin Quad Flat Package with heat sink Leadless QFN: Quad flat package, no-leads * QFN - quad flat non-leaded package http://pdfserv.maxim-ic.com/package_dwgs/21-0102.PDF * PQFN - power quad flat non-leaded package * SONQFN: Small Outline quad flat non-leaded package * TQFN: Thin quad flat non-leaded package * VQFN: very small quad flat non-leaded package * HVQFN:Heatsink Very-thin Quad Flat-pack No-leads http://www.standardics.nxp.com/packaging/hvqfn/ * DR QFN: * DQFN: Depopulated very-thin Quad Flat-pack No-leads http://www.standardics.nxp.com/packaging/dqfn/ SON: Small outline package, no-leads * SON: Small outline package, no-leads * PSON: Plastic Small outline package, no-leads * XSON, MicroPak: eXtremely thin Small Outline No leads http://www.standardics.nxp.com/packaging/micropak/ BGA: Ball grid array * BGA: Ball grid array * BGA1: Ball grid array (Intel) * BGA2: Ball grid array (Intel) * CBGA: Ceramic ball grid array http://www.analog.com/UploadedFiles/Packages/124017677BC_32_3.pdf * PBGA: Plastic ball grid array * FBGA, FPBGA: Fine pitch ball grid array * LFBGA - low profile fine pitch ball grid array JEDEC Standard No. 75, JESD75 http://focus.ti.com/pdfs/logic/lfbgadesign.pdf http://www.standardics.nxp.com/packaging/lfbga/ * μBGA - micro-ball grid array * HBGA Heat Spreader Ball Grid Array * HBGA: Hybrid Ball Grid Array http://www.altera.com/literature/ds/484-HBGA.pdf * TFBGA: Thin-profile Fine-pitch Ball Grid Array * PFBGA: Plastic Fine Pitch Ball Grid Array 0.5mm * PFBGA: Plastic Fine Pitch Ball Grid Array 0.8mm * TEPBGA: Thermally Enhanced Plastic Ball Grid Array * EBGA: Enhanced Ball Grid Array * LCBGA: Low Cost Ball Grid Array * CSBGA: http://pdfserv.maxim-ic.com/package_dwgs/21-0153.PDF * VFBGA: very-thin, fine-pitch ball grid array JEDEC JC-11 registration - MO-225 http://www.ti.com/lit/scet004 http://www.standardics.nxp.com/packaging/vfbga/ * Micro-Array * Micro-SMD * CSPBGA: Chip Scale Package Ball Grid Array http://www.analog.com/UploadedFiles/Packages/449094588153699501663966232134483BC32_adxrs.pdf * SBGA: Thermally Enhanced Ball Grid Array with Heatsink http://www.analog.com/UploadedFiles/Packages/3733895948083BP_304.pdf Others to be sorted ;CSP * CSP: Wafer level chip scale package * WL-CSP, WLCSP, WCSP, Nanostar: Wafer level chip scale package * UCSP: LAMINATED U chip scale package http://pdfserv.maxim-ic.com/package_dwgs/21-0082.PDF * TCSP: LAMINATED T chip scale package * LFCSP: LeadFrame chip scale package ;WLP * WLP: Wafer level package ;CGA * CCGA - ceramic column grid array * CGA - column grid array ;LGA * LGA: land grid array * PLGA: Plastic land grid array * CLGA: Ceramic land grid array * PILGA: * CSLGA: http://pdfserv.maxim-ic.com/package_dwgs/21-0153.PDF ;SOJ * SOJ: small outline J-lead * HSOJ: Heat sinked small outline J-lead * PSOJ: plastic small outline J-lead ;LCC, QFJ * LCC, QFJ - Leadless Chip Carrier http://pdfserv.maxim-ic.com/package_dwgs/21-0658.PDF * PLCC, PQFJ, : plastic leaded chip carrier http://pdfserv.maxim-ic.com/package_dwgs/21-0049.PDF * CLCC, CQFJ, LCCC: ceramic leaded chip carrier ;TO * TO-3 * TO-5 Plastic Header Package with flat index thru-hole http://www.analog.com/UploadedFiles/Packages/29791189TO_05.pdf * TO-8: Metal Header Package thru-hole http://www.analog.com/UploadedFiles/Packages/280776812H_12.pdf * TO-46 * TO-51: Metal Header Package thru-hole http://www.analog.com/UploadedFiles/Packages/40057714H_02.pdf * TO-51: Metal Header Package thru-hole * TO-52: Metal Header Package thru-hole http://www.analog.com/UploadedFiles/Packages/3970037392419133165H_03_1.pdf * TO-78: Metal Header Package thru-hole [http://www.analog.com/UploadedFiles/Packages/3726945423451238615H_06.pdf * TO-92 Plastic Header Package with flat index thru-hole http://www.analog.com/UploadedFiles/Packages/513513534748130490984981TO92.pdf * TO-99: Metal Header Package thru-hole http://pdfserv.maxim-ic.com/package_dwgs/21-0022.PDF * TO-100: Metal Header Package thru-hole http://pdfserv.maxim-ic.com/package_dwgs/21-0023.PDF * TO-126 * TO-218 * TO-220 * TO-220AB, SC-46 * TO-220F * TO-243, SC-62 * TO-247 * TO-251 * TO-252, SC-63, DPAK * TO-262 * TO-263 thin * TO-263, D2PAK * TO-264 * TO-268, D3PAK ;CO chip-on, Non-packaged devices * COB - chip-on-board * COF - chip-on-flex * COG - chip-on-glass ;PAK * DPAK: Deca-Watt Package (Hitachi) transistor * HDPAK: Huge Deca-watt PAcKage (Hitachi) transistor * LDPAK: Large Deca-watt PAcKage (Hitachi) diode * MPAK: Mini PAcKage (Hitachi) transistor * SMPAK: Super Mini Package (Hitachi) transistor * SPAK: Small PAcKage (Hitachi) transistor * UPAK: Uni-Watt Package (Hitachi) diode * LFPAK ;MLP * MLP: Micro Lead Frame Package * MLF: MicroLeadFrame (Amkor) * MLFQ: Micro Lead Frame Quad Package (Quad) * MLFD: Micro Lead Frame Package (Dual) * SP: Single in line Package (Hitachi) transistor * SRP: Small Resin Package (Hitachi) diode * SSP: Super Small resin Package (Hitachi) diode * UMD: Ultra Mini Diode (Hitachi) transistor * URP: Ultra small Resin Package (Hitachi) transistor * TAB: Tape Automated Bonding * MELF: Metal ELectrical Face * MLP - Leadframe package * TCCN: * CASON: Chip Array Small Outline No Lead * CERQUAD: CERamic QUAD in-line package * CMPAK: Compact Mini PAcKage Hitachi diode/transistor * CerPack: CERamic flatPACK * SOD - Small outline diode * SOG: Small Outline IC with Gull-wing leads * DSO: Dual Small Outline package * EQUAD * FC: Flip Chip ;I-leaded package * QFI: Quad Flat I-leaded package * HQFI: Heat sinked Quad Flat I-leaded package * SOI: Small Outline I-leaded package * HSOI: Heat sinked Small Outline I-leaded package * LLD: LeadLess Diode (Hitachi) * QFJ: quad flat J-lead * LRP: Large Resin Package (Hitachi) diode * MOP: Mini Oct-Lead Package (Hitachi) transistor * PLCCH: Plastic Leaded Chip Carrier with Heat spreader * PQ2: Power Quad flat package type 2 * QIL, QIP,QUIP, QUAD, QUIL: Quad In-line Package * QTCP: Quad Tape Carrier Package * SD: Side-brazed ceramic Dual in-line package * SECC: Single Edge Cartridge Connector (Intel) * SGA: Solder Grid Array * MELF: Metal ELectrical Face * MLP - Leadframe package * TD: Top-brazed ceramic Dual in-line package * CerQUAD: Ceramic quad package * DFP: Dual Flat Package * SONB: Small Outline Narrow-Body IC with gull-wing leads * LLDA * PMFP * LCC: Leadless Chip Carrier or Leadless Ceramic Carrier * LCCC: Leadless Ceramic Chip Carrier * QCCN * LLP * SHELLOP * MicroDFN, uDFN: http://pdfserv.maxim-ic.com/package_dwgs/21-0164.PDF * Ultra Thin MicroDFN: http://pdfserv.maxim-ic.com/package_dwgs/21-0190.PDF * SideBraze http://pdfserv.maxim-ic.com/package_dwgs/21-0047.PDF * WLP: WAFER LEVEL PACKAGE * BCC: * LPCC: * MFL: * PoP: Package-on-Package * FLATPACK: Ceramic Flat Package http://www.analog.com/UploadedFiles/Packages/301338669f_2.pdf http://www.analog.com/UploadedFiles/Packages/260162565F_10.pdf See also * Guide to computer chip or integrated circuit identification External links * JEITA package standards downloads * http://www.standardics.nxp.com/packaging/package.outlines/ *http://www.nxp.com/package/ * http://www.analog.com/Analog_Root/Packages/Packages_Home/0,2299,1,00.html Category:Howto Category:Chip Packages